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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-06-29 15:25:51 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-07-13 10:42:51 +0200 |
| commit | 2be7d540fde3f82e404cbddeeb2fdf05cf33af3c (patch) | |
| tree | 5b410246d2d54b65f57e5c9ed5cc0432089836dc /tools/perf/scripts/python/syscall-counts.py | |
| parent | 8fcd5cd8b3cb29019937ab4b773da27a37e8e79b (diff) | |
drm/i915: Refactor VLV display power well init/deinit
We do the exact same steps around the disp2d/pipe A power well
enable/disable on VLV and CHV. Refactor the shared code into
some helpers.
Note that this means we now call vlv_power_sequencer_reset() before
turning off the power well, whereas before we did it after. That
doesn't matter though since vlv_power_sequencer_reset() just resets
the power sequencer software tracking and doesn't touch the hardware
at all.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions