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authorPeter De Schrijver <[email protected]>2017-07-25 13:34:02 +0300
committerStephen Boyd <[email protected]>2017-08-23 15:56:53 -0700
commit1a7da87727acfc201141d67e6edf2fb4ddcab7db (patch)
treed7bff74b07e86abef51429c4e8092495cc8681d7 /tools/perf/scripts/python/syscall-counts.py
parentde2245540ed84c56ba3d71d1ce8e14fdaf332720 (diff)
clk: tegra: fix SS control on PLL enable/disable
PLL SS was only controlled when setting the PLL rate, not when the PLL itself is enabled or disabled. Signed-off-by: Peter De Schrijver <[email protected]> Reviewed-by: Jon Mayo <[email protected]> Tested-by: Thierry Reding <[email protected]> Acked-by: Thierry Reding <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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