diff options
| author | Swapnil Jakhade <[email protected]> | 2021-03-04 07:08:16 +0100 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2021-03-30 23:34:14 +0530 |
| commit | ed9e07f815cd66405895781dd29033c1a7b47b8a (patch) | |
| tree | 7fe069075fc5c71d2f52873e6815ab3e5fc05449 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 70901a7d64cb018df452b1a2880aba7f4416f508 (diff) | |
phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clock
Update PCIe + USB register sequences for correct PLL1 clock configuration.
Also, update sequences for other USB configurations with dependent changes.
Signed-off-by: Swapnil Jakhade <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions