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authorAbel Vesa <[email protected]>2024-10-21 15:46:25 +0300
committerBjorn Andersson <[email protected]>2024-10-22 15:35:15 -0500
commite7f37a7d16310d3c9474825de26a67f00983ebea (patch)
tree0859f0788c018faa63b0eec05485cf4cacdaece9 /tools/perf/scripts/python/syscall-counts-by-pid.py
parentbf0a800415a7397617765fe5f5278a645195c75a (diff)
clk: qcom: gcc-x1e80100: Fix USB MP SS1 PHY GDSC pwrsts flags
Allowing these GDSCs to collapse makes the QMP combo PHYs lose their configuration on machine suspend. Currently, the QMP combo PHY driver doesn't reinitialise the HW on resume. Under such conditions, the USB SuperSpeed support is broken. To avoid this, mark the pwrsts flags with RET_ON. This has been already done for USB 0 and 1 SS PHY GDSCs, Do this also for the USB MP SS1 PHY GDSC config. The USB MP SS0 PHY GDSC already has it. Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") Reviewed-by: Johan Hovold <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/20241021-x1e80100-clk-gcc-fix-usb-mp-phy-gdsc-pwrsts-flags-v2-1-0bfd64556238@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
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