diff options
author | Daniele Ceraolo Spurio <[email protected]> | 2016-12-23 15:56:21 -0800 |
---|---|---|
committer | Chris Wilson <[email protected]> | 2016-12-24 10:06:59 +0000 |
commit | d3ef1af6fdb67705d4569ac4b6ee11d91f6ab794 (patch) | |
tree | 5beca98e830dbf04f905326874e9a48edd30934f /tools/perf/scripts/python/syscall-counts-by-pid.py | |
parent | 00c25e3f40083a6d5f1111955baccd287ee49258 (diff) |
drm/i915: request ring to be pinned above GUC_WOPCM_TOP
GuC will validate the ring offset and fail if it is in the
[0, GUC_WOPCM_TOP) range. The bias is conditionally applied only
if GuC loading is enabled (we can't check for guc submission enabled as
in other cases because HuC loading requires this fix).
Note that the default context is processed before enable_guc_loading is
sanitized, so we might still apply the bias to its ring even if it is
not needed.
v2: compute the value during ctx init and pass it to
intel_ring_pin (Chris), updated commit message
Signed-off-by: Daniele Ceraolo Spurio <[email protected]>
Cc: Chris Wilson <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
Cc: Arkadiusz Hiler <[email protected]>
Cc: Anusha Srivatsa <[email protected]>
Cc: MichaĆ Winiarski <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/1482537382-28584-1-git-send-email-daniele.ceraolospurio@intel.com
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions