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| author | Kumar Gala <[email protected]> | 2011-10-22 16:58:40 -0500 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2011-11-24 02:01:37 -0600 |
| commit | 96488746bbfb3e25a9c451e198c4d7c4b2e0731f (patch) | |
| tree | 22e6300d0f89f30c3d78ed0ed0f7566a7f27f26f /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 532919592fcfb824aad0494f54e45a0acc83a776 (diff) | |
powerpc/85xx: Rework P1010RDB and P1010 device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1010-IP..." from compatibles for standard blocks
* PCI interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong
Signed-off-by: Kumar Gala <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions