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authorPeng Fan <[email protected]>2022-08-30 11:31:36 +0800
committerAbel Vesa <[email protected]>2022-09-19 13:06:45 +0300
commit92d1496fe8644f6612b7adff7581a31002dc8dd0 (patch)
treee3a429edf1cb2ed58f2d1196b58ed184a78848af /tools/perf/scripts/python/syscall-counts-by-pid.py
parentd91012fa0058a7bb189c9f20f497ef825f348197 (diff)
clk: imx93: add MU1/2 clock
The clk tree should be as: bus_aon_root------>\ /--->MU1_B IP -->MU_B gate--> bus_wakeup_root--->/ \--->MU2_B IP bus_aon_root------>\ /--->MU1_A IP -->MU_A gate--> bus_wakeup_root--->/ \--->MU2_A IP So need use shared count gate. And linux use MU_B, so set MU_A clk as CLK_IGNORE_UNUSED. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Ye Li <[email protected]> Reviewed-by: Jacky Bai <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
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