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author | Lubomir Rintel <[email protected]> | 2018-11-13 11:22:27 +0100 |
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committer | Mark Brown <[email protected]> | 2018-11-13 10:02:09 -0800 |
commit | 77d33897c68d56797a3201e06bdf10e2094a96d6 (patch) | |
tree | 8b762b220b3a3b7d72d2987fc844295dfb06cb98 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
parent | 8ae13d0b0d4bb4af99bec8c50152f0c8f5cbcc06 (diff) |
spi: pxa2xx: Add ready signal
Strobe a GPIO line when the slave TX FIFO is filled. This is how the
Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI
master, learns that it can initiate a transaction.
Signed-off-by: Lubomir Rintel <[email protected]>
Tested-by: Pavel Machek <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions