clk: vc5: Split clock input mux and predivider

Split the VC5 clock input mux and the predivider to more accurately
model the hardware and fix the previously incorrect assumption that
both the OUT_SEL_I2CB and the PLL are fed from the predivider.

It is in fact the clock input mux output which is directly feeding
the clock into the OUT_SEL_I2CB output, while the clock input mux
output first passes through the predivider before it is fed into
the PLL.

Signed-off-by: Marek Vasut <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Alexey Firago <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: [email protected]
Tested-by: Laurent Pinchart <[email protected]>
on Salvator-XS with the display LVDS output.
Signed-off-by: Stephen Boyd <[email protected]>

0 files changed, 0 insertions, 0 deletions