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| author | Kumar Gala <[email protected]> | 2011-10-20 02:21:09 -0500 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2011-11-24 02:01:37 -0600 |
| commit | 4e36afa7c5cd7d4585048263cbdc2b955117f590 (patch) | |
| tree | ac3a4b7d60714aff2beda44c91d54dffaa9b74ad /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 4de0e39cb883b26af667c660383ac26df525ae0b (diff) | |
powerpc/85xx: Rework P1020RDB device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Dropping "fsl,p1020-IP..." from compatibles for standard blocks
* Fixed PCIe interrupt-maps to have proper number of cells
* Added mdio node for etsec@26000
* Added usb node for 2nd usb controller
Signed-off-by: Kumar Gala <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions