diff options
| author | Javi Merino <[email protected]> | 2011-11-16 12:36:39 +0100 |
|---|---|---|
| committer | Russell King <[email protected]> | 2012-02-15 21:10:49 +0000 |
| commit | 4272f98a1ae81709fc5c804c33c044064e419cd9 (patch) | |
| tree | 0e3af4e730a6f1bbec98f3e4808dd272e8ae8e58 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 8e43a905dd574f54c5715d978318290ceafbe275 (diff) | |
ARM: 7164/3: PL330: Fix the size of the dst_cache_ctrl field
dst_cache_ctrl affects bits 3, 1 and 0 of AWCACHE but it is a 3-bit
field in the Channel Control Register (see Table 3-21 of the DMA-330
Technical Reference Manual) and should be programmed as such.
Reference: <[email protected]>
Signed-off-by: Javi Merino <[email protected]>
Acked-by: Jassi Brar <[email protected]>
Signed-off-by: Russell King <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions