dm9601: work around tx fifo sync issue on dm962x

Certain dm962x revisions contain an bug, where if a USB bulk transfer retry
(E.G. if bulk crc mismatch) happens right after a transfer with odd or
maxpacket length, the internal tx hardware fifo gets out of sync causing
the interface to stop working.

Work around it by adding up to 3 bytes of padding to ensure this situation
cannot trigger.

This workaround also means we never pass multiple-of-maxpacket size skb's
to usbnet, so the length adjustment to handle usbnet's padding of those can
be removed.

Cc: <[email protected]>
Reported-by: Joseph Chang <[email protected]>
Signed-off-by: Peter Korsgaard <[email protected]>
Signed-off-by: David S. Miller <[email protected]>

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