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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2018-06-07 13:06:11 +0200 |
|---|---|---|
| committer | Inki Dae <inki.dae@samsung.com> | 2018-06-29 18:02:57 +0900 |
| commit | 28b676329cc1adfa37b5291e13055e0819a80e42 (patch) | |
| tree | a421708ee73fc977280187e2b402db44a44fba4e /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 4958a1c0c9c4a48d6ba9e2b184d93cab0dce68e1 (diff) | |
drm/exynos: gsc: Increase Exynos5433 buffer width alignment to 16 pixels
Investigation revealed that GScaler hardware requires the real buffer width
(pitch) to be aligned to 16 pixels.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions