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| author | Sudhakar Rajashekhara <[email protected]> | 2010-07-20 15:24:01 -0700 |
|---|---|---|
| committer | David Woodhouse <[email protected]> | 2010-08-02 09:09:15 +0100 |
| commit | 1c3275b656045aff9a75bb2c9f3251af1043ebb3 (patch) | |
| tree | ec7a9bae3b851c17c7637c8034edbbec804a44c4 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 58373ff0afff4cc8ac40608872995f4d87eb72ec (diff) | |
mtd: nand: davinci: correct 4-bit error correction
On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the
4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and
before waiting for the NAND Flash status register to be equal to 1, 2 or
3, we have to wait till the ECC HW goes to correction state. Without this
wait, ECC correction calculations will not be proper.
This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365
EVMs.
Signed-off-by: Sudhakar Rajashekhara <[email protected]>
Acked-by: Sneha Narnakaje <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Artem Bityutskiy <[email protected]>
Signed-off-by: David Woodhouse <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions