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| author | Jakob Unterwurzacher <[email protected]> | 2024-09-26 15:20:30 +0200 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2024-09-30 10:39:23 +0200 |
| commit | 1871e6f7c5e606b97708af50a7fec83a904a761b (patch) | |
| tree | b3f4424e4c449c3fac0e55a92baf9ff959452bb2 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 157707e00085083079cdc9f5014ac31cc3319128 (diff) | |
arm64: dts: rockchip: add attiny_rst_gate to Ringneck
Ringneck v1.4 can contain (placement option) an on-board ATtiny
microcontroller instead of an STM32. In normal operation, this
is transparent to the software, as both microcontrollers emulate
the same ICs (amc6821 and isl1208).
For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is
used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if
we are running on an older Ringneck revision, SWITCH_REG1 is not connected
and has no effect.
Add attiny-updi-gate-regulator so userspace can control it via sysfs
(needs CONFIG_REGULATOR_USERSPACE_CONSUMER):
echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state
Signed-off-by: Jakob Unterwurzacher <[email protected]>
Tested-by: Quentin Schulz <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions