diff options
| author | Carl Huang <[email protected]> | 2020-12-10 16:05:22 +0200 |
|---|---|---|
| committer | Kalle Valo <[email protected]> | 2020-12-12 06:40:17 +0200 |
| commit | 0699940755e93fc307328523d58c15b8f42e5fe2 (patch) | |
| tree | e5aee3e6e09b52a51831e3baab33155966f1b946 /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | babb0ced6acdbaa0b5e0721ec7b347fdbdfa0f6f (diff) | |
ath11k: pci: fix L1ss clock unstable problem
For QCA6390, one PCI related clock drifts sometimes, and
it makes PCI link difficult to quit L1ss. Fix it by writing
some registers which are known to fix the problem.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1
Signed-off-by: Carl Huang <[email protected]>
Signed-off-by: Kalle Valo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions