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| author | Lars-Peter Clausen <lars@metafoo.de> | 2017-09-05 10:16:38 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-09-17 18:58:18 +0530 |
| commit | 008913dbeb1775ba365daa39462ca68884bd926f (patch) | |
| tree | ffeb591891f212ca16b30faae38ec711696ade6a /tools/perf/scripts/python/syscall-counts-by-pid.py | |
| parent | 63ab76dbbdb8657e24645b7311ec3911a41039b5 (diff) | |
dmaengine: axi-dmac: Fix software cyclic mode
When running in software cyclic mode the driver currently does not go back
to the first segment once the last segment has been reached. Effectively
making the transfer non-cyclic.
Fix this by going back to the first segment once the last segment has been
reached for cyclic transfers.
Special care need to be taken to avoid a segment from being submitted
multiple times concurrently, which could happen for transfers with a number
of segments that is smaller than the DMA controller's internal queue.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts-by-pid.py')
0 files changed, 0 insertions, 0 deletions