diff options
| author | Aric Cyr <[email protected]> | 2023-11-05 20:22:06 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-11-17 09:30:51 -0500 |
| commit | 59e4db5375f587954eb779ac9c7888a6c81c306b (patch) | |
| tree | cb8cfacfc340ef0296e434a89318ab41c9b34aef /tools/perf/scripts/python/stat-cpi.py | |
| parent | d9b3a066dfcd3fe50b4dc561d8510c43c0ad8863 (diff) | |
drm/amd/display: Promote DC to 3.2.260
- Add missing chips for HDCP
- Add new command to disable replay timing resync
- Fix encoder disable logic
- Enable DSC Flag in MST Mode Validation
- Change the DMCUB mailbox memory location from FB to inbox
- Add disable timeout option
- Negate IPS allow and commit bits
- Enable DCN clock gating for DCN35
- Prefer currently used OTG master when acquiring free pipe
- Try to acquire a free OTG master not used in cur ctx first
- Clear dpcd_sink_ext_caps if not set
- Enable fast plane updates on DCN3.2 and above
- Add null checks for 8K60 lightup
- Refactor resource into component directory
- Fix DSC not Enabled on Direct MST Sink
- Guard against invalid RPTR/WPTR being set
- Enable CM low mem power optimization
- Fix a debugfs null pointer error
Acked-by: Alex Hung <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stat-cpi.py')
0 files changed, 0 insertions, 0 deletions