diff options
| author | Vivien Didelot <[email protected]> | 2018-05-09 11:38:49 -0400 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2018-05-10 16:12:31 -0400 |
| commit | 02317e68369b0feecc18e791016d38a8e4df35f7 (patch) | |
| tree | c8741a3bcaa42c6d718851ec1976d674ca652b41 /tools/perf/scripts/python/stat-cpi.py | |
| parent | 79a6fd232748c5ece3c20c04855d181d81bec348 (diff) | |
net: dsa: mv88e6xxx: add a cascade port op
Only the 88E6185 family has bits 15:12 Cascade Port bits in the Global
Control 2 register. Hence inconsistent values are actually written in
this register for other families.
Add a .set_cascade_port operation to isolate the 88E6185 case, and call
it from the device mapping setup function.
Signed-off-by: Vivien Didelot <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stat-cpi.py')
0 files changed, 0 insertions, 0 deletions