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| author | Rob Herring <[email protected]> | 2021-12-17 15:11:36 -0600 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-01-31 18:20:21 -0600 |
| commit | fad35efa75a22050bb4b7cace8c1c9dd4fc70d16 (patch) | |
| tree | 2a67ec0c28df3b76902b0a14b3b704f3d9696156 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 2a03c21cca5ffd527c9ea2e88e52e58e1c69331b (diff) | |
arm64: dts: qcom: msm8998: Fix cache nodes
The msm8998 cache nodes have some issues. First, L1 caches are described
within cpu nodes, not as separate nodes. The 'next-level-cache' property
is of course in the correct location, otherwise the cache hierarchy
walking would not work. Remove all the L1 cache nodes.
Second, 'arm,arch-cache' is not a documented compatible string. "cache"
is a sufficient compatible string for the Arm architected caches.
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions