diff options
| author | Sowjanya Komatineni <[email protected]> | 2020-12-11 18:02:40 +0100 |
|---|---|---|
| committer | Mauro Carvalho Chehab <[email protected]> | 2021-01-04 13:02:44 +0100 |
| commit | f8c9dd2b826d8f1c23b8e86d5e4135a668a7bdd4 (patch) | |
| tree | a84752dd50b73a159939b363036fbc9afcb1dfa1 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 8f81888bec5c0a5f27083ca58024fb80fe902393 (diff) | |
media: dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes
Tegra VI/CSI hardware don't have native 8 lane CSI RX port.
But x8 capture can be supported by using consecutive x4 ports
simultaneously with HDMI-to-CSI bridges where source image is split
on to two x4 ports.
This patch updates dt-bindings for csi endpoint data-lane property
with maximum of 8 lanes.
Acked-by: Rob Herring <[email protected]>
Acked-by: Sakari Ailus <[email protected]>
Signed-off-by: Sowjanya Komatineni <[email protected]>
Signed-off-by: Hans Verkuil <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions