diff options
| author | Sean Christopherson <[email protected]> | 2022-05-12 22:27:15 +0000 |
|---|---|---|
| committer | Sean Christopherson <[email protected]> | 2022-07-08 14:57:12 -0700 |
| commit | f5223a332f3647a0e3725e9b4a102e9659c84ce4 (patch) | |
| tree | 3d6b4a5d060c7a7b743a038823ad70356fa0b40c /tools/perf/scripts/python/stackcollapse.py | |
| parent | 2368048bf5c2ec4b604ac3431564071e89a0bc71 (diff) | |
KVM: x86: Use explicit case-statements for MCx banks in {g,s}et_msr_mce()
Use an explicit case statement to grab the full range of MCx bank MSRs
in {g,s}et_msr_mce(), and manually check only the "end" (the number of
banks configured by userspace may be less than the max). The "default"
trick works, but is a bit odd now, and will be quite odd if/when support
for accessing MCx_CTL2 MSRs is added, which has near identical logic.
Hoist "offset" to function scope so as to avoid curly braces for the case
statement, and because MCx_CTL2 support will need the same variables.
Opportunstically clean up the comment about allowing bit 10 to be cleared
from bank 4.
No functional change intended.
Cc: Jue Wang <[email protected]>
Signed-off-by: Sean Christopherson <[email protected]>
Reviewed-by: Jim Mattson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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