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| author | Jouni Högander <[email protected]> | 2024-03-19 14:33:23 +0200 |
|---|---|---|
| committer | Jouni Högander <[email protected]> | 2024-03-28 15:04:41 +0200 |
| commit | f3b899f0b4b17fa0b20e27c23f78604d5686383d (patch) | |
| tree | 82936638b1ee92f1acb1b5fe7a404ce512649c3b /tools/perf/scripts/python/stackcollapse.py | |
| parent | ddf8a8bbb5643265883bab0c59adf0648422c4bb (diff) | |
drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value
When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on
every flip doing selective update. This patch calculates
PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and
stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later
during flip.
Bspec: 68927
Signed-off-by: Jouni Högander <[email protected]>
Reviewed-by: Mika Kahola <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions