diff options
| author | Arun Siluvery <[email protected]> | 2016-01-18 15:59:36 +0000 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2016-01-19 20:37:55 +0100 |
| commit | f3272e7a7456240209e758d6a995acbae1d21e8e (patch) | |
| tree | 3781975c2f4240a1a6c4979a619db9c86e54dbd4 /tools/perf/scripts/python/stackcollapse.py | |
| parent | cbfc2d26ac7364b45fbc6f5790a043c72c8a2230 (diff) | |
drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC
In GuC submission mode, driver has to provide a list of registers to be
save/restored during gpu reset, make the max no. of registers value consistent
with that of the value defined in FW. If they are not in sync then register
save/restore during gpu reset won't work as expected.
Cc: Alex Dai <[email protected]>
Cc: Dave Gordon <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Alex Dai <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions