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author | Eric Chanudet <echanude@redhat.com> | 2023-08-09 16:32:33 -0400 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2023-08-10 07:21:57 -0700 |
commit | e85cbb34f3eabc27d6e77cfde6c9afbab3d70b4b (patch) | |
tree | 87281a379c91b9cbf929888bcc6632652ed21b2b /tools/perf/scripts/python/stackcollapse.py | |
parent | 605a981e53dc226f0b654b3aa74c303e5ca7c051 (diff) |
arm64: dts: qcom: sa8540p-ride: enable rtc
SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions