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authorSergio Paracuellos <[email protected]>2018-11-24 18:54:54 +0100
committerGreg Kroah-Hartman <[email protected]>2018-11-26 20:59:05 +0100
commite51844bf825169024e0c743a92cf264e27f2366f (patch)
tree96ab5f4f56c0dd31d001a6771607a21dcab75233 /tools/perf/scripts/python/stackcollapse.py
parentfe62afd7eb0b54d676b5e4ae1a5b93cef704b78a (diff)
staging: mt7621-pci: fix reset lines for each pcie port
Depending of chip revision reset lines are inverted. It is also necessary to read PCIE_FTS_NUM register before enabling the phy. Hence update the code to achieve this. Fixes: 745eeeac68d7 ("staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function") Reported-by: NeilBrown <[email protected]> Signed-off-by: Sergio Paracuellos <[email protected]> Tested-by: NeilBrown <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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