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authorJosé Roberto de Souza <[email protected]>2019-07-30 10:51:21 -0700
committerJosé Roberto de Souza <[email protected]>2019-07-31 10:52:18 -0700
commitc2052d6e242c33594db90751a361aca1065a054a (patch)
tree3f71854943fdaf12941e3d1f4de0d67ec968953b /tools/perf/scripts/python/stackcollapse.py
parent1b6c3c6d4607784c83160cf7fb9c94fae5c117a1 (diff)
drm/i915/ehl: Ungate DDIC and DDID
Specification states that DDI_CLK_SEL needs to be mapped to MG clock even if MG do not exist on EHL, this will ungate those DDIs. BSpec: 20845 Cc: Matt Roper <[email protected]> Cc: Vivek Kasireddy <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Matt Roper <[email protected]> Tested-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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