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authorSai Krishna <[email protected]>2023-08-21 16:06:29 +0530
committerDavid S. Miller <[email protected]>2023-08-23 08:20:50 +0100
commitbdf79b128685458fecc42cd8709375d46407dae2 (patch)
tree46e73888d90467092b2fec69d15965e30baef9e2 /tools/perf/scripts/python/stackcollapse.py
parent6176b8c4a19e150c4176b1ed93174e2f5965c4b5 (diff)
octeontx2-pf: Use PTP HW timestamp counter atomic update feature
Some of the newer silicon versions in CN10K series supports a feature where in the current PTP timestamp in HW can be updated atomically without losing any cpu cycles unlike read/modify/write register. This patch uses this feature so that PTP accuracy can be improved while adjusting the master offset in HW. There is no need for SW timecounter when using this feature. So removed references to SW timecounter wherever appropriate. Signed-off-by: Sai Krishna <[email protected]> Signed-off-by: Naveen Mamindlapalli <[email protected]> Signed-off-by: Sunil Kovvuri Goutham <[email protected]> Reviewed-by: Kalesh AP <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Leon Romanovsky <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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