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| author | Like Xu <[email protected]> | 2020-06-13 16:09:48 +0800 |
|---|---|---|
| committer | Peter Zijlstra <[email protected]> | 2020-07-02 15:51:46 +0200 |
| commit | b2d6504761a50b9493eb4b20f6e188b673f20c32 (patch) | |
| tree | 32db6c3766c09fcb0a371e5a6a71737fc92dc155 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 027440b5d426a51f33b515bbd236cc479d1e051f (diff) | |
perf/x86/lbr: Add interface to get LBR information
The LBR records msrs are model specific. The perf subsystem has already
obtained the base addresses of LBR records based on the cpu model.
Therefore, an interface is added to allow callers outside the perf
subsystem to obtain these LBR information. It's useful for hypervisors
to emulate the LBR feature for guests with less code.
Signed-off-by: Like Xu <[email protected]>
Signed-off-by: Wei Wang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions