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author | P Praneesh <quic_ppranees@quicinc.com> | 2024-01-29 12:27:22 +0530 |
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committer | Kalle Valo <quic_kvalo@quicinc.com> | 2024-02-02 14:32:52 +0200 |
commit | afeee629e72eeed719eb3f2918d7c8f3ae33497f (patch) | |
tree | 32c20699fb7b63d89205ec4779b1063312e28491 /tools/perf/scripts/python/stackcollapse.py | |
parent | 57c8b5c332e587cceec5d6bde57146edc2f4af87 (diff) |
wifi: ath12k: fix PCI read and write
Currently, PCI read is failing for the registers belonging to
SECURITY_CONTROL_WLAN registers. These registers read is required
to read the board-id to identify the dual-mac QCN9274 hardware.
The failure is because, for these registers (SECURITY_CONTROL_WLAN)
offset, ath12k_pci_get_window_start() returns window_start as 0. Due
to this PCI read is done without PCI select window and with
window_start offset as 0.
Hence, fix PCI read and write by doing PCI select window and by using
the correct window_start offset - WINDOW_START for
SECURITY_CONTROL_WLAN registers.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00188-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Co-developed-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://msgid.link/20240129065724.2310207-12-quic_rajkbhag@quicinc.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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