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| author | Ulrich Hecht <[email protected]> | 2015-10-05 16:55:54 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2015-10-20 16:03:28 +0200 |
| commit | ae7465a0972aee889d79d94dbd1e65d3fab07414 (patch) | |
| tree | 06ddbae168509b580eb4789f21db4b4b77f6ec4d /tools/perf/scripts/python/stackcollapse.py | |
| parent | 22768fc60abbf58b04601b27796268f0363ab185 (diff) | |
pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf support
On this SoC there is no simple mapping of GP pins to pull-up register
bits, so we need a table.
Signed-off-by: Ulrich Hecht <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Acked-by: Laurent Pinchart <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions