diff options
| author | Manivannan Sadhasivam <[email protected]> | 2018-09-20 23:01:02 -0700 |
|---|---|---|
| committer | Wei Xu <[email protected]> | 2018-11-28 15:17:50 +0000 |
| commit | a758dd2e3a5108ab84c33c1069dd838f866b014e (patch) | |
| tree | 0e41dc99629f87070389b636523a52a15d8a6f3c /tools/perf/scripts/python/stackcollapse.py | |
| parent | c00e3f8080d1ad8645ba51ae34817df830b44fa2 (diff) | |
arm64: dts: hisilicon: Source SoC clock for UART6
Remove fixed clock and source SoC clock for UART6 for
HiSilicon Hi3670 SoC.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Wei Xu <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions