diff options
| author | Durgadoss R <[email protected]> | 2016-09-01 15:08:09 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2016-09-07 13:55:33 -0700 |
| commit | a277ca7dc01df9c7b8fe5b1d992d2bcc02e2ec23 (patch) | |
| tree | 7d2c193356eed6cf9cc7357a1023eabbef9745f7 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ba88d153526f31777ef40b065a772e8dbf97b7c0 (diff) | |
drm/i915: Split bxt_ddi_pll_select()
Split out of bxt_ddi_pll_select() the logic that calculates the pll
dividers and dpll_hw_state into a new function that doesn't depend on
crtc state. This will be used for enabling the port pll when doing
upfront link training.
v2:
* Refactored code so that bxt_clk_div need not be exported (Durga)
v1:
* Rebased on top of intel_dpll_mgr.c (Durga)
* Initial version from Ander on top of intel_ddi.c
Reviewed-by: Manasi Navare <[email protected]>
Signed-off-by: Ander Conselvan de Oliveira <[email protected]>
Signed-off-by: Durgadoss R <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions