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| author | Siddharth Vadapalli <[email protected]> | 2024-10-10 20:18:45 +0530 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2024-10-11 13:59:44 +0530 |
| commit | 9e544d46a2d11a0cb8b30d8ad4409c59bc168ce2 (patch) | |
| tree | b0bc84132469cb02e3b0d12d24dff6b77c7a0e39 /tools/perf/scripts/python/stackcollapse.py | |
| parent | bbcc9e2bde693ec3fc6aab650abaf748eb9f38f9 (diff) | |
phy: ti: gmii-sel: Enable USXGMII mode for J7200
TI's J7200 SoC supports USXGMII mode with the CPSW5G instance's MAC Port1.
Add USXGMII mode to the extra_modes member of J7200's SoC data.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions