pwm: omap-dmtimer: Round load and match values rather than truncate

When converting period and duty_cycle from nanoseconds to fclk cycles,
the error introduced by the integer division can be appreciable, especially
in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so
that the error is kept to +/- 0.5 clock cycles.

Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>

0 files changed, 0 insertions, 0 deletions