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authorArkadiusz Kubalewski <[email protected]>2023-10-31 18:08:00 +0100
committerTony Nguyen <[email protected]>2023-11-13 10:56:38 -0800
commit6db5f2cd9ebb12e930a82c01714a6589576cd50f (patch)
tree52d2281fda8b2bcf239ae7f2ec685d5a7e344f99 /tools/perf/scripts/python/stackcollapse.py
parent4a4027f25dc3f39c2aafb3bf8926125c5378c9dc (diff)
ice: dpll: fix output pin capabilities
The dpll output pins which are used to feed clock signal of PHY and MAC circuits cannot be disconnected, those integrated circuits require clock signal for operation. By stopping assignment of DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE pin capability, prevent the user from invoking the state set callback on those pins, setting the state on those pins already returns error, as firmware doesn't allow the change of their state. Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") Reviewed-by: Andrii Staikov <[email protected]> Signed-off-by: Arkadiusz Kubalewski <[email protected]> Tested-by: Sunitha Mekala <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]>
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