diff options
| author | Tiezhu Yang <[email protected]> | 2020-09-17 20:39:01 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <[email protected]> | 2020-09-21 22:19:07 +0200 |
| commit | 5fa1f7680f2728d62561db6d4a9282c4d21f2324 (patch) | |
| tree | 6e3018683bce6e7614ae3a06155affa7f73690fe /tools/perf/scripts/python/stackcollapse.py | |
| parent | c1f6b45e630a76d47506303defe111a48b651db1 (diff) | |
MIPS: Loongson64: Add UART node for LS7A PCH
When I update the latest kernel on the Loongson platform used with
LS7A bridge chip, the serial console has no output, this is because
the machine uses LS7A UART0 instead of CPU UART0, add UART node for
LS7A PCH to enhance the compatibility.
Signed-off-by: Tiezhu Yang <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions