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| author | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2020-10-07 15:29:52 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2023-06-08 16:01:45 +0200 |
| commit | 5d30d03aaf78586c37100006ba271d045f730bb5 (patch) | |
| tree | 530616ecb5c1b52798a0a4dd528eb12db631e0c0 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 9e4e24414cc6b45bd887d746a59691e295431ddf (diff) | |
arm64: dts: st: introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like
SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and
LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions