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author | Sean Christopherson <seanjc@google.com> | 2024-07-19 16:51:07 -0700 |
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committer | Sean Christopherson <seanjc@google.com> | 2024-08-29 16:25:06 -0700 |
commit | 5a7c7d148e488f43cf9c8e64fa5e1bd715ae0485 (patch) | |
tree | 73b2f6c5fdd4417af5d4067f491ae0af07d6b690 /tools/perf/scripts/python/stackcollapse.py | |
parent | 0cb26ec320851f685280ff061f84855d0e97bf86 (diff) |
KVM: selftests: Play nice with AMD's AVIC errata
When AVIC, and thus IPI virtualization on AMD, is enabled, the CPU will
virtualize ICR writes. Unfortunately, the CPU doesn't do a very good job,
as it fails to clear the BUSY bit and also allows writing ICR2[23:0],
despite them being "RESERVED MBZ". Account for the quirky behavior in
the xapic_state test to avoid failures in a configuration that likely has
no hope of ever being enabled in production.
Link: https://lore.kernel.org/r/20240719235107.3023592-11-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions