diff options
| author | Suzuki K Poulose <[email protected]> | 2020-11-27 10:52:46 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2020-11-27 20:23:12 +0100 |
| commit | 4e2187274fe8f3ddf55870e7e6b1aa7d65ba12eb (patch) | |
| tree | 0938bc410240d6623689fb2492f6665217a7b8ba /tools/perf/scripts/python/stackcollapse.py | |
| parent | f2603b22e3d2dcffd8b0736e5c68df497af6bc84 (diff) | |
coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2
Since ETMv4.2, TRCIDR3.NUMPROCS has been extended to a 5bit field
by encoding the top 2 bits[4:3] in TRCIDR3.[13:12], which were RES0.
Fix the driver to compute the field correctly for ETMv4.2+
Cc: Mike Leach <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
Signed-off-by: Mathieu Poirier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions