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| author | Vaishnav Achath <[email protected]> | 2024-02-15 14:25:15 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2024-02-19 09:56:39 +0530 |
| commit | 491821cebcf5cfa86dbc6bbf03f45322dea31b11 (patch) | |
| tree | e5078c35404299d16b205c60c0ba3ce350dde407 /tools/perf/scripts/python/stackcollapse.py | |
| parent | f87c88947396674586a42a163b72efa3999e3dee (diff) | |
arm64: dts: ti: k3-j721e-main: Add CSI2RX capture nodes
J721E has two CSI2RX capture subsystem featuring Cadence CSI2RX,
DPHY and TI's pixel grabbing wrapper. Add nodes for the same and
keep them disabled by default.
J721E TRM (Section 12.7 Camera Subsystem):
https://www.ti.com/lit/zip/spruil1
Signed-off-by: Vaishnav Achath <[email protected]>
Reviewed-by: Jai Luthra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions