ASoC: SOF: Intel: mtl: Access MTL_HFPWRCTL from HDA_DSP_BAR

The Host Power Management/Clock Control (ULP) Registers in
the HDA BAR shadow the values of the same registers in the DSP BAR,
so let's modify the latter - as done already for other accesses.

Signed-off-by: Yong Zhi <[email protected]>
Reviewed-by: Ranjani Sridharan <[email protected]>
Reviewed-by: Pierre-Louis Bossart <[email protected]>
Reviewed-by: Bard Liao <[email protected]>
Signed-off-by: Peter Ujfalusi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>

0 files changed, 0 insertions, 0 deletions