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| author | Aya Levin <[email protected]> | 2019-03-29 15:38:03 -0700 |
|---|---|---|
| committer | Saeed Mahameed <[email protected]> | 2019-04-02 12:49:38 -0700 |
| commit | 4039049b5c462d3bb9ee8a68c4375582f037d5f2 (patch) | |
| tree | 69a0fa7765d220491789b0401438931c174cd91e /tools/perf/scripts/python/stackcollapse.py | |
| parent | 3732b9720ffe0fedcadbcb5dc3add1dd0d926bcf (diff) | |
net/mlx5: Expose MPEIN (Management PCIE INfo) register layout
Expose PRM layout for handling MPEIN (Management PCIE Info). It will be
used in the downstream patch for querying MPEIN via the driver.
Signed-off-by: Aya Levin <[email protected]>
Signed-off-by: Saeed Mahameed <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions