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| author | Kishon Vijay Abraham I <[email protected]> | 2021-01-05 20:44:21 +0530 |
|---|---|---|
| committer | Nishanth Menon <[email protected]> | 2021-01-11 08:19:16 -0600 |
| commit | 3a6319df506f1a821abad2c71a580a2f7b78a304 (patch) | |
| tree | 4821d6cd77195acc6936f6a577c605cb46d2d4a2 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 429c0259f17f4fdf9c0beb5423b0c8f6c2ea2e8c (diff) | |
arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe
x2 lane PCIe slot in the common processor board is enabled and connected to
j7200 SOM. Add PCIe DT node in common processor board to reflect the
same.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Vignesh Raghavendra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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