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authorAtish Patra <[email protected]>2023-02-04 17:15:04 -0800
committerAnup Patel <[email protected]>2023-02-07 20:35:36 +0530
commit2723fb7b1e3d331fe6ce04629be6f66898a4cf3b (patch)
treeb30cf99a38341fd872871b81608fa8d4a7d42c54 /tools/perf/scripts/python/stackcollapse.py
parent8929283a687bb4b71ec9d3f1e827aecf829c6b1a (diff)
RISC-V: Improve SBI PMU extension related definitions
This patch fixes/improve few minor things in SBI PMU extension definition. 1. Align all the firmware event names. 2. Add macros for bit positions in cache event ID & ops. The changes were small enough to combine them together instead of creating 1 liner patches. Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Andrew Jones <[email protected]> Signed-off-by: Atish Patra <[email protected]> Signed-off-by: Anup Patel <[email protected]>
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