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authorQiang Yu <[email protected]>2024-10-16 20:04:06 -0700
committerVinod Koul <[email protected]>2024-10-17 18:21:52 +0530
commit26fb23ce35e2d2233f810069ab11210851acbf54 (patch)
tree7d941fd6a2084775bc63400b5c005c687b69790f /tools/perf/scripts/python/stackcollapse.py
parent6a612c86c8a5805c85fde359aa9c8aac6d5cba7a (diff)
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8
PCIe 3rd instance of X1E80100 supports Gen 4 x8 which needs different 8 lane capable QMP PCIe PHY with hardware revision v6.30. Document Gen 4 x8 PHY as separate module. Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Acked-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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