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authorJonathan Cameron <[email protected]>2022-05-08 18:56:38 +0100
committerJonathan Cameron <[email protected]>2022-06-14 11:53:17 +0100
commit1c20292c6b60cfc60a5e652174b8063e5cc03fec (patch)
treea97e9c9e48c027cbba3f0b24515d13f5febb502f /tools/perf/scripts/python/stackcollapse.py
parent69e51448ddfb9062efdf83e2d3179498e0aeb293 (diff)
iio: dac: ad8801: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7f270bc9a2d9 ("iio: dac: AD8801: add Analog Devices AD8801/AD8803 support") Signed-off-by: Jonathan Cameron <[email protected]> Acked-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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