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authorNicolas Saenz Julienne <[email protected]>2018-11-20 15:53:42 +0100
committerGreg Kroah-Hartman <[email protected]>2018-11-27 10:13:36 +0100
commit14f4d72fb799a9b3170a45ab80d4a3ddad541960 (patch)
tree29a8232ebb1cadfb2ef7cdebbd1279ffa99b2e4d /tools/perf/scripts/python/stackcollapse.py
parent44c1e1bcbc334c3716a802a84145650057748611 (diff)
staging: vchiq-core: get rid of is_master distinction
VCHIQ bulk transfers are what most people call DMA transfers. The CPU sends a list of physical addresses to the VideoCore which then access the memory directly without the need for CPU interaction. With this setup we call the CPU the "slave" and the VideoCore the "master". There seems to be an option to switch roles in vchiq. Which nobody is using nor is properly implemented. So we get rid of the "is_master == 1" option, and all the related code. Signed-off-by: Nicolas Saenz Julienne <[email protected]> Acked-by: Stefan Wahren <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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