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author | Yihan Zhu <Yihan.Zhu@amd.com> | 2024-09-07 13:25:19 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2024-10-01 18:08:13 -0400 |
commit | 0d5e5e8a0aa49ea2163abf128da3b509a6c58286 (patch) | |
tree | d19fb6c747a84ef5f65044a0d809170c23a086f8 /tools/perf/scripts/python/stackcollapse.py | |
parent | d7d2688bf4ea58734d73e18edcbf4684b1496d30 (diff) |
drm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35
[WHY & HOW]
Mismatch in DCN35 DML2 cause bw validation failed to acquire unexpected DPP pipe to cause
grey screen and system hang. Remove EnhancedPrefetchScheduleAccelerationFinal value override
to match HW spec.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Yihan Zhu <Yihan.Zhu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 9dad21f910fcea2bdcff4af46159101d7f9cd8ba)
Cc: stable@vger.kernel.org
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions