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| author | Dhinakaran Pandiyan <[email protected]> | 2018-10-05 11:56:42 -0700 |
|---|---|---|
| committer | Dhinakaran Pandiyan <[email protected]> | 2018-10-29 12:43:37 -0700 |
| commit | 09209662618f9fdc38b8d4da39040c8829fd2d57 (patch) | |
| tree | 73e0cf99e8e1e12d4e00748dd8e56c64b4dd0902 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 1ca2b067d07b491bd82bbaf235841b2a9b3d0c09 (diff) | |
drm/i915: Fix VIDEO_DIP_CTL bit shifts
The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
definitions are unused.
v2: Moves definitions in another patch (Manasi)
Cc: Manasi Navare <[email protected]>
Cc: Anusha Srivatsa <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
Signed-off-by: Dhinakaran Pandiyan <[email protected]>
Reviewed-by: Manasi Navare <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions